119 |
{ "MMX ", XVID_CPU_MMX }, |
{ "MMX ", XVID_CPU_MMX }, |
120 |
{ "MMXEXT ", XVID_CPU_MMXEXT | XVID_CPU_MMX }, |
{ "MMXEXT ", XVID_CPU_MMXEXT | XVID_CPU_MMX }, |
121 |
{ "SSE2 ", XVID_CPU_SSE2 | XVID_CPU_MMX }, |
{ "SSE2 ", XVID_CPU_SSE2 | XVID_CPU_MMX }, |
122 |
|
{ "SSE3 ", XVID_CPU_SSE3 | XVID_CPU_SSE2 | XVID_CPU_MMX }, |
123 |
|
{ "SSE41 ", XVID_CPU_SSE41| XVID_CPU_SSE3 | XVID_CPU_SSE2 | XVID_CPU_MMX }, |
124 |
{ "3DNOW ", XVID_CPU_3DNOW }, |
{ "3DNOW ", XVID_CPU_3DNOW }, |
125 |
{ "3DNOWE ", XVID_CPU_3DNOW | XVID_CPU_3DNOWEXT }, |
{ "3DNOWE ", XVID_CPU_3DNOW | XVID_CPU_3DNOWEXT }, |
126 |
#endif |
#endif |
2062 |
lum8x8 = lum_8x8_c; |
lum8x8 = lum_8x8_c; |
2063 |
lum2x8 = lum_2x8_c; |
lum2x8 = lum_2x8_c; |
2064 |
csim = consim_c; |
csim = consim_c; |
2065 |
|
#ifdef ARCH_IS_IA32 |
2066 |
if (cpu->cpu & XVID_CPU_MMX){ |
if (cpu->cpu & XVID_CPU_MMX){ |
2067 |
lum8x8 = lum_8x8_mmx; |
lum8x8 = lum_8x8_mmx; |
2068 |
csim = consim_mmx; |
csim = consim_mmx; |
2070 |
if (cpu->cpu & XVID_CPU_MMX){ |
if (cpu->cpu & XVID_CPU_MMX){ |
2071 |
csim = consim_sse2; |
csim = consim_sse2; |
2072 |
} |
} |
2073 |
|
#endif |
2074 |
t = gettime_usec(); |
t = gettime_usec(); |
2075 |
emms(); |
emms(); |
2076 |
for(tst=0; tst<nb_tests; ++tst) m = lum8x8(Ref1, 16); |
for(tst=0; tst<nb_tests; ++tst) m = lum8x8(Ref1, 16); |
2182 |
else if (!strcmp(argv[c], "-mmx")) cpu_mask = XVID_CPU_MMX | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-mmx")) cpu_mask = XVID_CPU_MMX | XVID_CPU_FORCE; |
2183 |
else if (!strcmp(argv[c], "-mmxext")) cpu_mask = XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-mmxext")) cpu_mask = XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
2184 |
else if (!strcmp(argv[c], "-sse2")) cpu_mask = XVID_CPU_SSE2 | XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-sse2")) cpu_mask = XVID_CPU_SSE2 | XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
2185 |
|
else if (!strcmp(argv[c], "-sse3")) cpu_mask = XVID_CPU_SSE3 | XVID_CPU_SSE2 | XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
2186 |
|
else if (!strcmp(argv[c], "-sse4")) cpu_mask = XVID_CPU_SSE41 | XVID_CPU_SSE3 | XVID_CPU_SSE2 | XVID_CPU_MMXEXT | XVID_CPU_MMX | XVID_CPU_FORCE; |
2187 |
else if (!strcmp(argv[c], "-3dnow")) cpu_mask = XVID_CPU_3DNOW | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-3dnow")) cpu_mask = XVID_CPU_3DNOW | XVID_CPU_FORCE; |
2188 |
else if (!strcmp(argv[c], "-3dnowe")) cpu_mask = XVID_CPU_3DNOW | XVID_CPU_3DNOWEXT | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-3dnowe")) cpu_mask = XVID_CPU_3DNOW | XVID_CPU_3DNOWEXT | XVID_CPU_FORCE; |
2189 |
else if (!strcmp(argv[c], "-altivec")) cpu_mask = XVID_CPU_ALTIVEC | XVID_CPU_FORCE; |
else if (!strcmp(argv[c], "-altivec")) cpu_mask = XVID_CPU_ALTIVEC | XVID_CPU_FORCE; |