1 |
;/************************************************************************** |
;/**************************************************************************** |
2 |
; * |
; * |
3 |
; * XVID MPEG-4 VIDEO CODEC |
; * XVID MPEG-4 VIDEO CODEC |
4 |
; * xmm sum of absolute difference |
; * - K7 optimized SAD operators - |
5 |
; * |
; * |
6 |
; * This program is an implementation of a part of one or more MPEG-4 |
; * Copyright(C) 2002 Jaan Kalda |
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; * Video tools as specified in ISO/IEC 14496-2 standard. Those intending |
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; * to use this software module in hardware or software products are |
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; * advised that its use may infringe existing patents or copyrights, and |
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; * any such use would be at such party's own risk. The original |
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; * developer of this software module and his/her company, and subsequent |
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; * editors and their companies, will have no liability for use of this |
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; * software or modifications or derivatives thereof. |
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7 |
; * |
; * |
8 |
; * This program is free software; you can redistribute it and/or modify |
; * This program is free software; you can redistribute it and/or modify it |
9 |
; * it under the terms of the GNU General Public License as published by |
; * under the terms of the GNU General Public License as published by |
10 |
; * the Free Software Foundation; either version 2 of the License, or |
; * the Free Software Foundation; either version 2 of the License, or |
11 |
; * (at your option) any later version. |
; * (at your option) any later version. |
12 |
; * |
; * |
17 |
; * |
; * |
18 |
; * You should have received a copy of the GNU General Public License |
; * You should have received a copy of the GNU General Public License |
19 |
; * along with this program; if not, write to the Free Software |
; * along with this program; if not, write to the Free Software |
20 |
; * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 |
; * |
; * |
22 |
; *************************************************************************/ |
; * $Id$ |
23 |
; |
; * |
24 |
; these 3dne functions are compatible with iSSE, but are optimized specifically for |
; ***************************************************************************/ |
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; K7 pipelines |
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; |
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;------------------------------------------------------------------------------ |
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; 09.12.2002 Athlon optimizations contributed by Jaan Kalda |
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;------------------------------------------------------------------------------ |
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25 |
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26 |
bits 32 |
; these 3dne functions are compatible with iSSE, but are optimized specifically |
27 |
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; for K7 pipelines |
28 |
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29 |
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BITS 32 |
30 |
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31 |
%macro cglobal 1 |
%macro cglobal 1 |
32 |
%ifdef PREFIX |
%ifdef PREFIX |
33 |
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%ifdef MARK_FUNCS |
34 |
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global _%1:function %1.endfunc-%1 |
35 |
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%define %1 _%1:function %1.endfunc-%1 |
36 |
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%else |
37 |
global _%1 |
global _%1 |
38 |
%define %1 _%1 |
%define %1 _%1 |
39 |
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%endif |
40 |
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%else |
41 |
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%ifdef MARK_FUNCS |
42 |
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global %1:function %1.endfunc-%1 |
43 |
%else |
%else |
44 |
global %1 |
global %1 |
45 |
%endif |
%endif |
46 |
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%endif |
47 |
%endmacro |
%endmacro |
48 |
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49 |
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;============================================================================= |
50 |
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; Read only data |
51 |
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;============================================================================= |
52 |
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53 |
%ifdef FORMAT_COFF |
%ifdef FORMAT_COFF |
54 |
section .data data |
SECTION .rodata |
55 |
%else |
%else |
56 |
section .data data align=16 |
SECTION .rodata align=16 |
57 |
%endif |
%endif |
58 |
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59 |
align 16 |
ALIGN 16 |
60 |
mmx_one times 4 dw 1 |
mmx_one: |
61 |
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times 4 dw 1 |
62 |
section .text |
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63 |
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;============================================================================= |
64 |
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; Helper macros |
65 |
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;============================================================================= |
66 |
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67 |
cglobal sad16_3dne |
;; %1 block number (0..4) |
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cglobal sad8_3dne |
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cglobal sad16bi_3dne |
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cglobal sad8bi_3dne |
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cglobal dev16_3dne |
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;=========================================================================== |
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; |
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; uint32_t sad16_3dne(const uint8_t * const cur, |
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; const uint8_t * const ref, |
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; const uint32_t stride, |
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; const uint32_t best_sad); |
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; |
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;=========================================================================== |
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; optimization: 21% faster |
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68 |
%macro SAD_16x16_SSE 1 |
%macro SAD_16x16_SSE 1 |
69 |
movq mm7, [eax] |
movq mm7, [eax] |
70 |
movq mm6, [eax+8] |
movq mm6, [eax+8] |
100 |
paddd mm1,mm3 |
paddd mm1,mm3 |
101 |
%endmacro |
%endmacro |
102 |
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103 |
align 16 |
%macro SADBI_16x16_SSE0 0 |
104 |
sad16_3dne: |
movq mm2, [edx] |
105 |
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movq mm3, [edx+8] |
106 |
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107 |
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movq mm5, [byte eax] |
108 |
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movq mm6, [eax+8] |
109 |
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pavgb mm2, [byte ebx] |
110 |
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pavgb mm3, [ebx+8] |
111 |
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112 |
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add edx, ecx |
113 |
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psadbw mm5, mm2 |
114 |
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psadbw mm6, mm3 |
115 |
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116 |
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add eax, ecx |
117 |
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add ebx, ecx |
118 |
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movq mm2, [byte edx] |
119 |
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120 |
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movq mm3, [edx+8] |
121 |
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movq mm0, [byte eax] |
122 |
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123 |
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movq mm1, [eax+8] |
124 |
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pavgb mm2, [byte ebx] |
125 |
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126 |
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pavgb mm3, [ebx+8] |
127 |
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add edx, ecx |
128 |
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add eax, ecx |
129 |
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130 |
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add ebx, ecx |
131 |
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psadbw mm0, mm2 |
132 |
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psadbw mm1, mm3 |
133 |
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134 |
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%endmacro |
135 |
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136 |
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%macro SADBI_16x16_SSE 0 |
137 |
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movq mm2, [byte edx] |
138 |
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movq mm3, [edx+8] |
139 |
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paddusw mm5, mm0 |
140 |
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paddusw mm6, mm1 |
141 |
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movq mm0, [eax] |
142 |
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movq mm1, [eax+8] |
143 |
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pavgb mm2, [ebx] |
144 |
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pavgb mm3, [ebx+8] |
145 |
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add edx, ecx |
146 |
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add eax, ecx |
147 |
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add ebx, ecx |
148 |
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psadbw mm0, mm2 |
149 |
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psadbw mm1, mm3 |
150 |
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%endmacro |
151 |
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152 |
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%macro SADBI_8x8_3dne 0 |
153 |
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movq mm2, [edx] |
154 |
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movq mm3, [edx+ecx] |
155 |
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pavgb mm2, [eax] |
156 |
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pavgb mm3, [eax+ecx] |
157 |
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lea edx, [edx+2*ecx] |
158 |
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lea eax, [eax+2*ecx] |
159 |
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paddusw mm5, mm0 |
160 |
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paddusw mm6, mm1 |
161 |
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movq mm0, [ebx] |
162 |
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movq mm1, [ebx+ecx] |
163 |
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lea ebx, [ebx+2*ecx] |
164 |
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psadbw mm0, mm2 |
165 |
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psadbw mm1, mm3 |
166 |
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%endmacro |
167 |
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168 |
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%macro ABS_16x16_SSE 1 |
169 |
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%if (%1 == 0) |
170 |
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movq mm7, [eax] |
171 |
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psadbw mm7, mm4 |
172 |
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mov esi, esi |
173 |
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movq mm6, [eax+8] |
174 |
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movq mm5, [eax+ecx] |
175 |
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movq mm3, [eax+ecx+8] |
176 |
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psadbw mm6, mm4 |
177 |
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178 |
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movq mm2, [byte eax+2*ecx] |
179 |
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psadbw mm5, mm4 |
180 |
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movq mm1, [eax+2*ecx+8] |
181 |
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psadbw mm3, mm4 |
182 |
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183 |
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movq mm0, [dword eax+edx] |
184 |
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psadbw mm2, mm4 |
185 |
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add eax, edx |
186 |
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psadbw mm1, mm4 |
187 |
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%endif |
188 |
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%if (%1 == 1) |
189 |
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psadbw mm0, mm4 |
190 |
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paddd mm7, mm0 |
191 |
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movq mm0, [eax+8] |
192 |
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psadbw mm0, mm4 |
193 |
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paddd mm6, mm0 |
194 |
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195 |
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movq mm0, [byte eax+ecx] |
196 |
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psadbw mm0, mm4 |
197 |
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198 |
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paddd mm5, mm0 |
199 |
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movq mm0, [eax+ecx+8] |
200 |
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201 |
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psadbw mm0, mm4 |
202 |
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paddd mm3, mm0 |
203 |
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movq mm0, [eax+2*ecx] |
204 |
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psadbw mm0, mm4 |
205 |
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paddd mm2, mm0 |
206 |
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207 |
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movq mm0, [eax+2*ecx+8] |
208 |
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add eax, edx |
209 |
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psadbw mm0, mm4 |
210 |
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paddd mm1, mm0 |
211 |
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movq mm0, [eax] |
212 |
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%endif |
213 |
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%if (%1 == 2) |
214 |
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psadbw mm0, mm4 |
215 |
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paddd mm7, mm0 |
216 |
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movq mm0, [eax+8] |
217 |
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psadbw mm0, mm4 |
218 |
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paddd mm6, mm0 |
219 |
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%endif |
220 |
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%endmacro |
221 |
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222 |
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;============================================================================= |
223 |
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; Code |
224 |
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;============================================================================= |
225 |
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226 |
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SECTION .text |
227 |
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228 |
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cglobal sad16_3dne |
229 |
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cglobal sad8_3dne |
230 |
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cglobal sad16bi_3dne |
231 |
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cglobal sad8bi_3dne |
232 |
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cglobal dev16_3dne |
233 |
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234 |
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;----------------------------------------------------------------------------- |
235 |
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; |
236 |
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; uint32_t sad16_3dne(const uint8_t * const cur, |
237 |
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; const uint8_t * const ref, |
238 |
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; const uint32_t stride, |
239 |
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; const uint32_t best_sad); |
240 |
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; |
241 |
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;----------------------------------------------------------------------------- |
242 |
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243 |
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; optimization: 21% faster |
244 |
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245 |
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ALIGN 16 |
246 |
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sad16_3dne: |
247 |
mov eax, [esp+ 4] ; Src1 |
mov eax, [esp+ 4] ; Src1 |
248 |
mov edx, [esp+ 8] ; Src2 |
mov edx, [esp+ 8] ; Src2 |
249 |
mov ecx, [esp+12] ; Stride |
mov ecx, [esp+12] ; Stride |
250 |
push ebx |
push ebx |
251 |
lea ebx,[2*ecx+ecx] |
lea ebx,[2*ecx+ecx] |
252 |
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253 |
SAD_16x16_SSE 0 |
SAD_16x16_SSE 0 |
254 |
SAD_16x16_SSE 1 |
SAD_16x16_SSE 1 |
255 |
SAD_16x16_SSE 2 |
SAD_16x16_SSE 2 |
256 |
SAD_16x16_SSE 3 |
SAD_16x16_SSE 3 |
257 |
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258 |
mov ecx,[esp] |
mov ecx,[esp] |
259 |
add ecx,[esp+4] |
add ecx,[esp+4] |
260 |
add ecx,[esp+8] |
add ecx,[esp+8] |
263 |
add esp,byte 4+12 |
add esp,byte 4+12 |
264 |
movd eax, mm1 |
movd eax, mm1 |
265 |
add eax,ecx |
add eax,ecx |
266 |
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267 |
ret |
ret |
268 |
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.endfunc |
269 |
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270 |
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271 |
;=========================================================================== |
;----------------------------------------------------------------------------- |
272 |
; |
; |
273 |
; uint32_t sad8_3dne(const uint8_t * const cur, |
; uint32_t sad8_3dne(const uint8_t * const cur, |
274 |
; const uint8_t * const ref, |
; const uint8_t * const ref, |
275 |
; const uint32_t stride); |
; const uint32_t stride); |
276 |
; |
; |
277 |
;=========================================================================== |
;----------------------------------------------------------------------------- |
278 |
align 16 |
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279 |
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ALIGN 16 |
280 |
sad8_3dne: |
sad8_3dne: |
281 |
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282 |
mov eax, [esp+ 4] ; Src1 |
mov eax, [esp+ 4] ; Src1 |
320 |
movd eax, mm0 |
movd eax, mm0 |
321 |
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322 |
ret |
ret |
323 |
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.endfunc |
324 |
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325 |
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326 |
;=========================================================================== |
;----------------------------------------------------------------------------- |
327 |
; |
; |
328 |
; uint32_t sad16bi_3dne(const uint8_t * const cur, |
; uint32_t sad16bi_3dne(const uint8_t * const cur, |
329 |
; const uint8_t * const ref1, |
; const uint8_t * const ref1, |
330 |
; const uint8_t * const ref2, |
; const uint8_t * const ref2, |
331 |
; const uint32_t stride); |
; const uint32_t stride); |
332 |
; |
; |
333 |
;=========================================================================== |
;----------------------------------------------------------------------------- |
334 |
;optimization: 14% faster |
;optimization: 14% faster |
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%macro SADBI_16x16_SSE0 0 |
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movq mm2, [edx] |
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movq mm3, [edx+8] |
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movq mm5, [byte eax] |
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movq mm6, [eax+8] |
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pavgb mm2, [byte ebx] |
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pavgb mm3, [ebx+8] |
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add edx, ecx |
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psadbw mm5, mm2 |
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psadbw mm6, mm3 |
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add eax, ecx |
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add ebx, ecx |
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movq mm2, [byte edx] |
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movq mm3, [edx+8] |
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movq mm0, [byte eax] |
|
335 |
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336 |
movq mm1, [eax+8] |
ALIGN 16 |
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pavgb mm2, [byte ebx] |
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pavgb mm3, [ebx+8] |
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add edx, ecx |
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add eax, ecx |
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add ebx, ecx |
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psadbw mm0, mm2 |
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psadbw mm1, mm3 |
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%endmacro |
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%macro SADBI_16x16_SSE 0 |
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movq mm2, [byte edx] |
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movq mm3, [edx+8] |
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paddusw mm5,mm0 |
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paddusw mm6,mm1 |
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movq mm0, [eax] |
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movq mm1, [eax+8] |
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pavgb mm2, [ebx] |
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pavgb mm3, [ebx+8] |
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add edx, ecx |
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add eax, ecx |
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add ebx, ecx |
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psadbw mm0, mm2 |
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psadbw mm1, mm3 |
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%endmacro |
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align 16 |
|
337 |
sad16bi_3dne: |
sad16bi_3dne: |
338 |
mov eax, [esp+ 4] ; Src |
mov eax, [esp+ 4] ; Src |
339 |
mov edx, [esp+ 8] ; Ref1 |
mov edx, [esp+ 8] ; Ref1 |
363 |
pop ebx |
pop ebx |
364 |
paddusw mm6,mm5 |
paddusw mm6,mm5 |
365 |
movd eax, mm6 |
movd eax, mm6 |
366 |
|
|
367 |
ret |
ret |
368 |
;=========================================================================== |
.endfunc |
369 |
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|
370 |
|
;----------------------------------------------------------------------------- |
371 |
; |
; |
372 |
; uint32_t sad8bi_3dne(const uint8_t * const cur, |
; uint32_t sad8bi_3dne(const uint8_t * const cur, |
373 |
; const uint8_t * const ref1, |
; const uint8_t * const ref1, |
374 |
; const uint8_t * const ref2, |
; const uint8_t * const ref2, |
375 |
; const uint32_t stride); |
; const uint32_t stride); |
376 |
; |
; |
377 |
;=========================================================================== |
;----------------------------------------------------------------------------- |
378 |
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|
379 |
%macro SADBI_8x8_3dne 0 |
ALIGN 16 |
|
movq mm2, [edx] |
|
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movq mm3, [edx+ecx] |
|
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pavgb mm2, [eax] |
|
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pavgb mm3, [eax+ecx] |
|
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lea edx, [edx+2*ecx] |
|
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lea eax, [eax+2*ecx] |
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paddusw mm5,mm0 |
|
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paddusw mm6,mm1 |
|
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movq mm0, [ebx] |
|
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movq mm1, [ebx+ecx] |
|
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lea ebx, [ebx+2*ecx] |
|
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psadbw mm0, mm2 |
|
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psadbw mm1, mm3 |
|
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%endmacro |
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align 16 |
|
380 |
sad8bi_3dne: |
sad8bi_3dne: |
381 |
mov eax, [esp+12] ; Ref2 |
mov eax, [esp+12] ; Ref2 |
382 |
mov edx, [esp+ 8] ; Ref1 |
mov edx, [esp+ 8] ; Ref1 |
439 |
mov ebx,[esp] |
mov ebx,[esp] |
440 |
add esp,byte 4 |
add esp,byte 4 |
441 |
movd eax, mm6 |
movd eax, mm6 |
442 |
|
|
443 |
ret |
ret |
444 |
|
.endfunc |
445 |
|
|
446 |
|
|
447 |
;=========================================================================== |
;=========================================================================== |
451 |
; |
; |
452 |
;=========================================================================== |
;=========================================================================== |
453 |
; optimization: 25 % faster |
; optimization: 25 % faster |
|
%macro ABS_16x16_SSE 1 |
|
|
%if (%1 == 0) |
|
|
movq mm7, [eax] |
|
|
psadbw mm7, mm4 |
|
|
mov esi,esi |
|
|
movq mm6, [eax+8] |
|
|
movq mm5, [eax+ecx] |
|
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movq mm3, [eax+ecx+8] |
|
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psadbw mm6, mm4 |
|
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|
|
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movq mm2, [byte eax+2*ecx] |
|
|
psadbw mm5, mm4 |
|
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movq mm1, [eax+2*ecx+8] |
|
|
psadbw mm3, mm4 |
|
454 |
|
|
455 |
movq mm0, [dword eax+edx] |
ALIGN 16 |
|
psadbw mm2, mm4 |
|
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add eax,edx |
|
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psadbw mm1, mm4 |
|
|
%endif |
|
|
%if (%1 == 1) |
|
|
psadbw mm0, mm4 |
|
|
paddd mm7, mm0 |
|
|
movq mm0, [eax+8] |
|
|
psadbw mm0, mm4 |
|
|
paddd mm6, mm0 |
|
|
|
|
|
movq mm0, [byte eax+ecx] |
|
|
psadbw mm0, mm4 |
|
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|
|
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paddd mm5, mm0 |
|
|
movq mm0, [eax+ecx+8] |
|
|
|
|
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psadbw mm0, mm4 |
|
|
paddd mm3, mm0 |
|
|
movq mm0, [eax+2*ecx] |
|
|
psadbw mm0, mm4 |
|
|
paddd mm2, mm0 |
|
|
|
|
|
movq mm0, [eax+2*ecx+8] |
|
|
add eax,edx |
|
|
psadbw mm0, mm4 |
|
|
paddd mm1, mm0 |
|
|
movq mm0, [eax] |
|
|
%endif |
|
|
%if (%1 == 2) |
|
|
psadbw mm0, mm4 |
|
|
paddd mm7, mm0 |
|
|
movq mm0, [eax+8] |
|
|
psadbw mm0, mm4 |
|
|
paddd mm6, mm0 |
|
|
%endif |
|
|
%endmacro |
|
|
|
|
|
align 16 |
|
456 |
dev16_3dne: |
dev16_3dne: |
457 |
|
|
458 |
mov eax, [esp+ 4] ; Src |
mov eax, [esp+ 4] ; Src |
460 |
lea edx,[ecx+2*ecx] |
lea edx,[ecx+2*ecx] |
461 |
|
|
462 |
pxor mm4, mm4 |
pxor mm4, mm4 |
463 |
align 8 |
|
464 |
|
ALIGN 8 |
465 |
ABS_16x16_SSE 0 |
ABS_16x16_SSE 0 |
466 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
467 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
468 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
469 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
470 |
|
|
471 |
paddd mm1, mm2 |
paddd mm1, mm2 |
472 |
paddd mm3, mm5 |
paddd mm3, mm5 |
473 |
|
|
474 |
ABS_16x16_SSE 2 |
ABS_16x16_SSE 2 |
475 |
|
|
476 |
paddd mm7, mm6 |
paddd mm7, mm6 |
477 |
paddd mm1, mm3 |
paddd mm1, mm3 |
478 |
mov eax, [esp+ 4] ; Src |
mov eax, [esp+ 4] ; Src |
479 |
paddd mm7,mm1 |
paddd mm7,mm1 |
480 |
punpcklbw mm7,mm7 ;xxyyaazz |
punpcklbw mm7,mm7 ;xxyyaazz |
481 |
pshufw mm4,mm7,055h |
pshufw mm4, mm7, 055h ; mm4 contains the mean |
482 |
; mm4 contains the mean |
|
483 |
|
|
484 |
pxor mm1, mm1 |
pxor mm1, mm1 |
485 |
|
|
486 |
ABS_16x16_SSE 0 |
ABS_16x16_SSE 0 |
488 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
489 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
490 |
ABS_16x16_SSE 1 |
ABS_16x16_SSE 1 |
491 |
|
|
492 |
paddd mm1, mm2 |
paddd mm1, mm2 |
493 |
paddd mm3, mm5 |
paddd mm3, mm5 |
494 |
|
|
495 |
ABS_16x16_SSE 2 |
ABS_16x16_SSE 2 |
496 |
|
|
497 |
paddd mm7, mm6 |
paddd mm7, mm6 |
498 |
paddd mm1, mm3 |
paddd mm1, mm3 |
499 |
paddd mm7,mm1 |
paddd mm7,mm1 |
500 |
movd eax, mm7 |
movd eax, mm7 |
501 |
|
|
502 |
ret |
ret |
503 |
|
.endfunc |
504 |
|
|