30 |
%ifdef MARK_FUNCS |
%ifdef MARK_FUNCS |
31 |
global _%1:function %1.endfunc-%1 |
global _%1:function %1.endfunc-%1 |
32 |
%define %1 _%1:function %1.endfunc-%1 |
%define %1 _%1:function %1.endfunc-%1 |
33 |
|
%define ENDFUNC .endfunc |
34 |
%else |
%else |
35 |
global _%1 |
global _%1 |
36 |
%define %1 _%1 |
%define %1 _%1 |
37 |
|
%define ENDFUNC |
38 |
%endif |
%endif |
39 |
%else |
%else |
40 |
%ifdef MARK_FUNCS |
%ifdef MARK_FUNCS |
41 |
global %1:function %1.endfunc-%1 |
global %1:function %1.endfunc-%1 |
42 |
|
%define ENDFUNC .endfunc |
43 |
%else |
%else |
44 |
global %1 |
global %1 |
45 |
|
%define ENDFUNC |
46 |
%endif |
%endif |
47 |
%endif |
%endif |
48 |
%endmacro |
%endmacro |
56 |
%define CPUID_SSE 0x02000000 |
%define CPUID_SSE 0x02000000 |
57 |
%define CPUID_SSE2 0x04000000 |
%define CPUID_SSE2 0x04000000 |
58 |
%define CPUID_SSE3 0x00000001 |
%define CPUID_SSE3 0x00000001 |
59 |
|
%define CPUID_SSE41 0x00080000 |
60 |
|
|
61 |
%define EXT_CPUID_3DNOW 0x80000000 |
%define EXT_CPUID_3DNOW 0x80000000 |
62 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
68 |
%define XVID_CPU_SSE (1<< 2) |
%define XVID_CPU_SSE (1<< 2) |
69 |
%define XVID_CPU_SSE2 (1<< 3) |
%define XVID_CPU_SSE2 (1<< 3) |
70 |
%define XVID_CPU_SSE3 (1<< 8) |
%define XVID_CPU_SSE3 (1<< 8) |
71 |
|
%define XVID_CPU_SSE41 (1<< 9) |
72 |
%define XVID_CPU_3DNOW (1<< 4) |
%define XVID_CPU_3DNOW (1<< 4) |
73 |
%define XVID_CPU_3DNOWEXT (1<< 5) |
%define XVID_CPU_3DNOWEXT (1<< 5) |
74 |
%define XVID_CPU_TSC (1<< 6) |
%define XVID_CPU_TSC (1<< 6) |
91 |
; Macros |
; Macros |
92 |
;============================================================================= |
;============================================================================= |
93 |
|
|
94 |
%macro CHECK_FEATURE 3 |
%macro CHECK_FEATURE 4 |
95 |
mov ecx, %1 |
mov eax, %1 |
96 |
and ecx, edx |
and eax, %4 |
97 |
neg ecx |
neg eax |
98 |
sbb ecx, ecx |
sbb eax, eax |
99 |
and ecx, %2 |
and eax, %2 |
100 |
or %3, ecx |
or %3, eax |
101 |
%endmacro |
%endmacro |
102 |
|
|
103 |
;============================================================================= |
;============================================================================= |
148 |
cpuid |
cpuid |
149 |
|
|
150 |
; RDTSC command ? |
; RDTSC command ? |
151 |
CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp |
CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp, edx |
152 |
|
|
153 |
; MMX support ? |
; MMX support ? |
154 |
CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp |
CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp, edx |
155 |
|
|
156 |
; SSE support ? |
; SSE support ? |
157 |
CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp |
CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp, edx |
158 |
|
|
159 |
; SSE2 support? |
; SSE2 support? |
160 |
CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp |
CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp, edx |
161 |
|
|
162 |
; SSE3 support? |
; SSE3 support? |
163 |
CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp |
CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp, ecx |
164 |
|
|
165 |
|
; SSE41 support? |
166 |
|
CHECK_FEATURE CPUID_SSE41, XVID_CPU_SSE41, ebp, ecx |
167 |
|
|
168 |
; extended functions? |
; extended functions? |
169 |
mov eax, 0x80000000 |
mov eax, 0x80000000 |
183 |
jnz .cpu_quit |
jnz .cpu_quit |
184 |
|
|
185 |
; 3DNow! support ? |
; 3DNow! support ? |
186 |
CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp |
CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp, edx |
187 |
|
|
188 |
; 3DNOW extended ? |
; 3DNOW extended ? |
189 |
CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp |
CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp, edx |
190 |
|
|
191 |
; extended MMX ? |
; extended MMX ? |
192 |
CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp |
CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp, edx |
193 |
|
|
194 |
.cpu_quit: |
.cpu_quit: |
195 |
|
|
203 |
pop ebx |
pop ebx |
204 |
|
|
205 |
ret |
ret |
206 |
.endfunc |
ENDFUNC |
207 |
|
|
208 |
; sse/sse2 operating support detection routines |
; sse/sse2 operating support detection routines |
209 |
; these will trigger an invalid instruction signal if not supported. |
; these will trigger an invalid instruction signal if not supported. |
212 |
sse_os_trigger: |
sse_os_trigger: |
213 |
xorps xmm0, xmm0 |
xorps xmm0, xmm0 |
214 |
ret |
ret |
215 |
.endfunc |
ENDFUNC |
216 |
|
|
217 |
|
|
218 |
ALIGN 16 |
ALIGN 16 |
220 |
sse2_os_trigger: |
sse2_os_trigger: |
221 |
xorpd xmm0, xmm0 |
xorpd xmm0, xmm0 |
222 |
ret |
ret |
223 |
.endfunc |
ENDFUNC |
224 |
|
|
225 |
|
|
226 |
; enter/exit mmx state |
; enter/exit mmx state |
229 |
emms_mmx: |
emms_mmx: |
230 |
emms |
emms |
231 |
ret |
ret |
232 |
.endfunc |
ENDFUNC |
233 |
|
|
234 |
; faster enter/exit mmx state |
; faster enter/exit mmx state |
235 |
ALIGN 16 |
ALIGN 16 |
237 |
emms_3dn: |
emms_3dn: |
238 |
femms |
femms |
239 |
ret |
ret |
240 |
.endfunc |
ENDFUNC |
241 |
|
|
242 |
|
|
243 |
|
|
244 |
|
%ifidn __OUTPUT_FORMAT__,elf |
245 |
|
section ".note.GNU-stack" noalloc noexec nowrite progbits |
246 |
|
%endif |
247 |
|
|