--- cpuid.asm	2004/07/24 11:46:08	1.7
+++ cpuid.asm	2007/03/08 21:40:12	1.11
@@ -19,7 +19,7 @@
 ; *  along with this program ; if not, write to the Free Software
 ; *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 ; *
-; * $Id: cpuid.asm,v 1.7 2004/07/24 11:46:08 edgomez Exp $
+; * $Id: cpuid.asm,v 1.11 2007/03/08 21:40:12 Isibaar Exp $
 ; *
 ; ***************************************************************************/
 
@@ -27,10 +27,19 @@
 
 %macro cglobal 1
 	%ifdef PREFIX
-		global _%1
-		%define %1 _%1
+		%ifdef MARK_FUNCS
+			global _%1:function %1.endfunc-%1
+			%define %1 _%1:function %1.endfunc-%1
+		%else
+			global _%1
+			%define %1 _%1
+		%endif
 	%else
-		global %1
+		%ifdef MARK_FUNCS
+			global %1:function %1.endfunc-%1
+		%else
+			global %1
+		%endif
 	%endif
 %endmacro
 
@@ -42,6 +51,7 @@
 %define CPUID_MMX               0x00800000
 %define CPUID_SSE               0x02000000
 %define CPUID_SSE2              0x04000000
+%define CPUID_SSE3              0x00000001
 
 %define EXT_CPUID_3DNOW         0x80000000
 %define EXT_CPUID_AMD_3DNOWEXT  0x40000000
@@ -52,6 +62,7 @@
 %define XVID_CPU_MMXEXT   (1<< 1)
 %define XVID_CPU_SSE      (1<< 2)
 %define XVID_CPU_SSE2     (1<< 3)
+%define XVID_CPU_SSE3     (1<< 8)
 %define XVID_CPU_3DNOW    (1<< 4)
 %define XVID_CPU_3DNOWEXT (1<< 5)
 %define XVID_CPU_TSC      (1<< 6)
@@ -74,13 +85,13 @@
 ; Macros
 ;=============================================================================
 
-%macro  CHECK_FEATURE         3
-  mov ecx, %1
-  and ecx, edx
-  neg ecx
-  sbb ecx, ecx
-  and ecx, %2
-  or %3, ecx
+%macro  CHECK_FEATURE         4
+  mov eax, %1
+  and eax, %4
+  neg eax
+  sbb eax, eax
+  and eax, %2
+  or %3, eax
 %endmacro
 
 ;=============================================================================
@@ -131,16 +142,19 @@
   cpuid
 
  ; RDTSC command ?
-  CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp
+  CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp, edx
 
   ; MMX support ?
-  CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp
+  CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp, edx
 
   ; SSE support ?
-  CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp
+  CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp, edx
 
   ; SSE2 support?
-  CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp
+  CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp, edx
+
+  ; SSE3 support?
+  CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp, ecx
 
   ; extended functions?
   mov eax, 0x80000000
@@ -160,13 +174,13 @@
   jnz .cpu_quit
 
   ; 3DNow! support ?
-  CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp
+  CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp, edx
 
   ; 3DNOW extended ?
-  CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp
+  CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp, edx
 
   ; extended MMX ?
-  CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp
+  CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp, edx
 
 .cpu_quit:
 
@@ -180,6 +194,7 @@
   pop ebx
 
   ret
+.endfunc
 
 ; sse/sse2 operating support detection routines
 ; these will trigger an invalid instruction signal if not supported.
@@ -188,6 +203,7 @@
 sse_os_trigger:
   xorps xmm0, xmm0
   ret
+.endfunc
 
 
 ALIGN 16
@@ -195,6 +211,7 @@
 sse2_os_trigger:
   xorpd xmm0, xmm0
   ret
+.endfunc
 
 
 ; enter/exit mmx state
@@ -203,6 +220,7 @@
 emms_mmx:
   emms
   ret
+.endfunc
 
 ; faster enter/exit mmx state
 ALIGN 16
@@ -210,3 +228,6 @@
 emms_3dn:
   femms
   ret
+.endfunc
+
+