3 |
; * XVID MPEG-4 VIDEO CODEC |
; * XVID MPEG-4 VIDEO CODEC |
4 |
; * - CPUID check processors capabilities - |
; * - CPUID check processors capabilities - |
5 |
; * |
; * |
6 |
; * Copyright (C) 2001 Michael Militzer <isibaar@xvid.org> |
; * Copyright (C) 2001-2008 Michael Militzer <michael@xvid.org> |
7 |
; * |
; * |
8 |
; * This program is free software ; you can redistribute it and/or modify |
; * This program is free software ; you can redistribute it and/or modify |
9 |
; * it under the terms of the GNU General Public License as published by |
; * it under the terms of the GNU General Public License as published by |
23 |
; * |
; * |
24 |
; ***************************************************************************/ |
; ***************************************************************************/ |
25 |
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26 |
BITS 32 |
%include "nasm.inc" |
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%macro cglobal 1 |
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%ifdef PREFIX |
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%ifdef MARK_FUNCS |
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global _%1:function %1.endfunc-%1 |
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%define %1 _%1:function %1.endfunc-%1 |
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%define ENDFUNC .endfunc |
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%else |
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global _%1 |
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%define %1 _%1 |
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%define ENDFUNC |
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%endif |
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%else |
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%ifdef MARK_FUNCS |
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global %1:function %1.endfunc-%1 |
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%define ENDFUNC .endfunc |
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%else |
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global %1 |
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%define ENDFUNC |
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%endif |
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%endif |
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%endmacro |
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27 |
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28 |
;============================================================================= |
;============================================================================= |
29 |
; Constants |
; Constants |
55 |
; Read only data |
; Read only data |
56 |
;============================================================================= |
;============================================================================= |
57 |
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58 |
ALIGN 32 |
ALIGN SECTION_ALIGN |
59 |
%ifdef FORMAT_COFF |
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60 |
SECTION .rodata |
DATA |
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%else |
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SECTION .rodata align=16 |
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%endif |
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61 |
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62 |
vendorAMD: |
vendorAMD: |
63 |
db "AuthenticAMD" |
db "AuthenticAMD" |
79 |
; Code |
; Code |
80 |
;============================================================================= |
;============================================================================= |
81 |
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82 |
SECTION .text |
%ifdef ARCH_IS_X86_64 |
83 |
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%define XVID_PUSHFD pushfq |
84 |
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%define XVID_POPFD popfq |
85 |
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%else |
86 |
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%define XVID_PUSHFD pushfd |
87 |
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%define XVID_POPFD popfd |
88 |
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%endif |
89 |
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90 |
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SECTION .rotext align=SECTION_ALIGN |
91 |
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92 |
; int check_cpu_feature(void) |
; int check_cpu_feature(void) |
93 |
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94 |
cglobal check_cpu_features |
cglobal check_cpu_features |
95 |
check_cpu_features: |
check_cpu_features: |
96 |
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97 |
push ebx |
push _EBX |
98 |
push esi |
push _ESI |
99 |
push edi |
push _EDI |
100 |
push ebp |
push _EBP |
101 |
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102 |
sub esp, 12 ; Stack space for vendor name |
sub _ESP, 12 ; Stack space for vendor name |
103 |
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104 |
xor ebp, ebp |
xor ebp, ebp |
105 |
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106 |
; CPUID command ? |
; CPUID command ? |
107 |
pushfd |
XVID_PUSHFD |
108 |
pop eax |
pop _EAX |
109 |
mov ecx, eax |
mov ecx, eax |
110 |
xor eax, 0x200000 |
xor eax, 0x200000 |
111 |
push eax |
push _EAX |
112 |
popfd |
XVID_POPFD |
113 |
pushfd |
XVID_PUSHFD |
114 |
pop eax |
pop _EAX |
115 |
cmp eax, ecx |
cmp eax, ecx |
116 |
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117 |
jz near .cpu_quit ; no CPUID command -> exit |
jz near .cpu_quit ; no CPUID command -> exit |
118 |
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119 |
; get vendor string, used later |
; get vendor string, used later |
120 |
xor eax, eax |
xor eax, eax |
121 |
cpuid |
cpuid |
122 |
mov [esp], ebx ; vendor string |
mov [_ESP], ebx ; vendor string |
123 |
mov [esp+4], edx |
mov [_ESP+4], edx |
124 |
mov [esp+8], ecx |
mov [_ESP+8], ecx |
125 |
test eax, eax |
test eax, eax |
126 |
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127 |
jz near .cpu_quit |
jz near .cpu_quit |
157 |
cpuid |
cpuid |
158 |
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159 |
; AMD cpu ? |
; AMD cpu ? |
160 |
lea esi, [vendorAMD] |
lea _ESI, [vendorAMD] |
161 |
lea edi, [esp] |
lea _EDI, [_ESP] |
162 |
mov ecx, 12 |
mov ecx, 12 |
163 |
cld |
cld |
164 |
repe cmpsb |
repe cmpsb |
177 |
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178 |
mov eax, ebp |
mov eax, ebp |
179 |
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180 |
add esp, 12 |
add _ESP, 12 |
181 |
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182 |
pop ebp |
pop _EBP |
183 |
pop edi |
pop _EDI |
184 |
pop esi |
pop _ESI |
185 |
pop ebx |
pop _EBX |
186 |
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187 |
ret |
ret |
188 |
ENDFUNC |
ENDFUNC |
189 |
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190 |
; sse/sse2 operating support detection routines |
; sse/sse2 operating support detection routines |
191 |
; these will trigger an invalid instruction signal if not supported. |
; these will trigger an invalid instruction signal if not supported. |
192 |
ALIGN 16 |
ALIGN SECTION_ALIGN |
193 |
cglobal sse_os_trigger |
cglobal sse_os_trigger |
194 |
sse_os_trigger: |
sse_os_trigger: |
195 |
xorps xmm0, xmm0 |
xorps xmm0, xmm0 |
197 |
ENDFUNC |
ENDFUNC |
198 |
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199 |
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200 |
ALIGN 16 |
ALIGN SECTION_ALIGN |
201 |
cglobal sse2_os_trigger |
cglobal sse2_os_trigger |
202 |
sse2_os_trigger: |
sse2_os_trigger: |
203 |
xorpd xmm0, xmm0 |
xorpd xmm0, xmm0 |
206 |
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207 |
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208 |
; enter/exit mmx state |
; enter/exit mmx state |
209 |
ALIGN 16 |
ALIGN SECTION_ALIGN |
210 |
cglobal emms_mmx |
cglobal emms_mmx |
211 |
emms_mmx: |
emms_mmx: |
212 |
emms |
emms |
214 |
ENDFUNC |
ENDFUNC |
215 |
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216 |
; faster enter/exit mmx state |
; faster enter/exit mmx state |
217 |
ALIGN 16 |
ALIGN SECTION_ALIGN |
218 |
cglobal emms_3dn |
cglobal emms_3dn |
219 |
emms_3dn: |
emms_3dn: |
220 |
femms |
femms |