481 |
interpolate8x8_halfpel_hv = interpolate8x8_halfpel_hv_3dne; |
interpolate8x8_halfpel_hv = interpolate8x8_halfpel_hv_3dne; |
482 |
} |
} |
483 |
|
|
|
#if defined(EXPERIMENTAL_SSE2_CODE) /* mark the whole SSE2 stuff as experimental. At least on |
|
|
my P4, it crashes... */ |
|
484 |
if ((cpu_flags & XVID_CPU_SSE2)) { |
if ((cpu_flags & XVID_CPU_SSE2)) { |
485 |
|
|
486 |
calc_cbp = calc_cbp_sse2; |
calc_cbp = calc_cbp_sse2; |
495 |
sad16 = sad16_sse2; |
sad16 = sad16_sse2; |
496 |
dev16 = dev16_sse2; |
dev16 = dev16_sse2; |
497 |
|
|
498 |
/* DCT operators */ |
/* DCT operators |
499 |
|
* no iDCT because it's not "Walken matching" */ |
500 |
fdct = fdct_sse2_skal; |
fdct = fdct_sse2_skal; |
|
idct = idct_sse2_dmitry; |
|
501 |
} |
} |
502 |
#endif |
#endif /* ARCH_IS_IA32 */ |
|
#endif |
|
503 |
|
|
504 |
#if defined(ARCH_IS_IA64) |
#if defined(ARCH_IS_IA64) |
505 |
if ((cpu_flags & XVID_CPU_ASM)) { /* use assembler routines? */ |
if ((cpu_flags & XVID_CPU_ASM)) { /* use assembler routines? */ |