57 |
#define XVID_API_MAJOR(a) (((a)>>16) & 0xff) |
#define XVID_API_MAJOR(a) (((a)>>16) & 0xff) |
58 |
#define XVID_API_MINOR(a) (((a)>> 0) & 0xff) |
#define XVID_API_MINOR(a) (((a)>> 0) & 0xff) |
59 |
|
|
60 |
#define XVID_VERSION XVID_MAKE_VERSION(1,2,-127) |
#define XVID_VERSION XVID_MAKE_VERSION(1,3,-127) |
61 |
#define XVID_API XVID_MAKE_API(4, 1) |
#define XVID_API XVID_MAKE_API(4, 3) |
62 |
|
|
63 |
#define XVID_UNSTABLE |
#define XVID_UNSTABLE |
64 |
|
|
73 |
* doesnt hurt but not increasing it could cause difficulty for decoders in the |
* doesnt hurt but not increasing it could cause difficulty for decoders in the |
74 |
* future |
* future |
75 |
*/ |
*/ |
76 |
#define XVID_BS_VERSION 45 |
#define XVID_BS_VERSION 55 |
77 |
|
|
78 |
/***************************************************************************** |
/***************************************************************************** |
79 |
* error codes |
* error codes |
102 |
#define XVID_CSP_YUY2 (1<< 3) /* 4:2:2 packed */ |
#define XVID_CSP_YUY2 (1<< 3) /* 4:2:2 packed */ |
103 |
#define XVID_CSP_UYVY (1<< 4) /* 4:2:2 packed */ |
#define XVID_CSP_UYVY (1<< 4) /* 4:2:2 packed */ |
104 |
#define XVID_CSP_YVYU (1<< 5) /* 4:2:2 packed */ |
#define XVID_CSP_YVYU (1<< 5) /* 4:2:2 packed */ |
105 |
|
#define XVID_CSP_RGB (1<<16) /* 24-bit rgb packed */ |
106 |
#define XVID_CSP_BGRA (1<< 6) /* 32-bit bgra packed */ |
#define XVID_CSP_BGRA (1<< 6) /* 32-bit bgra packed */ |
107 |
#define XVID_CSP_ABGR (1<< 7) /* 32-bit abgr packed */ |
#define XVID_CSP_ABGR (1<< 7) /* 32-bit abgr packed */ |
108 |
#define XVID_CSP_RGBA (1<< 8) /* 32-bit rgba packed */ |
#define XVID_CSP_RGBA (1<< 8) /* 32-bit rgba packed */ |
170 |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
171 |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
172 |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
173 |
|
#define XVID_CPU_SSE3 (1<< 8) /* sse3 : pentium4, athlon64 */ |
174 |
|
#define XVID_CPU_SSE41 (1<< 9) /* sse41: penryn */ |
175 |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
176 |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
177 |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |
552 |
/*visualize*/ |
/*visualize*/ |
553 |
int b_visualize; |
int b_visualize; |
554 |
|
|
555 |
|
/*accuracy 0 very accurate 4 very fast*/ |
556 |
|
int acc; |
557 |
|
|
558 |
|
int cpu_flags; /* XVID_CPU_XXX flags */ |
559 |
|
|
560 |
} xvid_plugin_ssim_t; |
} xvid_plugin_ssim_t; |
561 |
|
|
562 |
|
typedef struct { |
563 |
|
int version; |
564 |
|
|
565 |
|
int method; /* [in] masking method to apply. 0 for luminance masking, 1 for variance masking */ |
566 |
|
} xvid_plugin_lumimasking_t; |
567 |
|
|
568 |
/***************************************************************************** |
/***************************************************************************** |
569 |
* ENCODER API |
* ENCODER API |
570 |
****************************************************************************/ |
****************************************************************************/ |