96 |
****************************************************************************/ |
****************************************************************************/ |
97 |
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98 |
/* CPU flags for XVID_INIT_PARAM.cpu_flags */ |
/* CPU flags for XVID_INIT_PARAM.cpu_flags */ |
99 |
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#define XVID_CPU_FORCE 0x80000000 |
100 |
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#define XVID_CPU_CHKONLY 0x40000000 /* check cpu only; dont init globals */ |
101 |
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102 |
#define XVID_CPU_MMX 0x00000001 |
#define XVID_CPU_ASM 0x00000080 /* native assembly */ |
103 |
#define XVID_CPU_MMXEXT 0x00000002 |
/* ARCH_X86 */ |
104 |
#define XVID_CPU_SSE 0x00000004 |
#define XVID_CPU_MMX 0x00000001 /* mmx: pentiumMMX,k6 */ |
105 |
#define XVID_CPU_SSE2 0x00000008 |
#define XVID_CPU_MMXEXT 0x00000002 /* mmxx-ext: pentium2,athlon */ |
106 |
#define XVID_CPU_3DNOW 0x00000010 |
#define XVID_CPU_SSE 0x00000004 /* sse: pentium3,athlonXP */ |
107 |
#define XVID_CPU_3DNOWEXT 0x00000020 |
#define XVID_CPU_SSE2 0x00000008 /* sse2: pentium4,athlon64 */ |
108 |
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#define XVID_CPU_3DNOW 0x00000010 /* 3dnow: k6-2 */ |
109 |
#define XVID_CPU_TSC 0x00000040 |
#define XVID_CPU_3DNOWEXT 0x00000020 /* 3dnow-ext: athlon */ |
110 |
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#define XVID_CPU_TSC 0x00000040 /* timestamp counter */ |
111 |
#define XVID_CPU_IA64 0x00000080 |
/* ARCH_IA64 */ |
112 |
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#define XVID_CPU_IA64 XVID_CPU_ASM /* defined for backward compatibility */ |
113 |
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/* ARCH_PPC */ |
114 |
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#define XVID_CPU_ALTIVEC 0x00000001 /* altivec */ |
115 |
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#define XVID_CPU_CHKONLY 0x40000000 /* check cpu only; dont init globals */ |
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#define XVID_CPU_FORCE 0x80000000 |
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116 |
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117 |
typedef struct |
typedef struct |
118 |
{ |
{ |