170 |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
171 |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
172 |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
173 |
|
#define XVID_CPU_SSE3 (1<< 8) /* sse3 : pentium4, athlon64 */ |
174 |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
175 |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
176 |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |