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Diff of /xvidcore/src/xvid.h

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revision 1.17.2.14, Thu Dec 12 10:37:44 2002 UTC revision 1.17.2.19, Sat Jan 4 06:14:32 2003 UTC
# Line 46  Line 46 
46    
47  /* API Version : 2.1 */  /* API Version : 2.1 */
48  #define API_VERSION ((2 << 16) | (1))  #define API_VERSION ((2 << 16) | (1))
49    #define XVID_API_UNSTABLE
50    
51  /* Bitstream Version  /* Bitstream Version
52   * this will be writen into the bitstream to allow easy detection of xvid   * this will be writen into the bitstream to allow easy detection of xvid
# Line 95  Line 96 
96   ****************************************************************************/   ****************************************************************************/
97    
98  /* CPU flags for XVID_INIT_PARAM.cpu_flags */  /* CPU flags for XVID_INIT_PARAM.cpu_flags */
99    #define XVID_CPU_FORCE          0x80000000
100    #define XVID_CPU_CHKONLY        0x40000000              /* check cpu only; dont init globals */
101    
102  #define XVID_CPU_MMX            0x00000001  #define XVID_CPU_ASM            0x00000080              /* native assembly */
103  #define XVID_CPU_MMXEXT         0x00000002  /* ARCH_X86 */
104  #define XVID_CPU_SSE            0x00000004  #define XVID_CPU_MMX            0x00000001              /* mmx: pentiumMMX,k6 */
105  #define XVID_CPU_SSE2           0x00000008  #define XVID_CPU_MMXEXT         0x00000002              /* mmxx-ext: pentium2,athlon */
106  #define XVID_CPU_3DNOW          0x00000010  #define XVID_CPU_SSE            0x00000004              /* sse: pentium3,athlonXP */
107  #define XVID_CPU_3DNOWEXT       0x00000020  #define XVID_CPU_SSE2           0x00000008              /* sse2: pentium4,athlon64 */
108    #define XVID_CPU_3DNOW          0x00000010              /* 3dnow: k6-2 */
109  #define XVID_CPU_TSC            0x00000040  #define XVID_CPU_3DNOWEXT       0x00000020              /* 3dnow-ext: athlon */
110    #define XVID_CPU_TSC            0x00000040              /* timestamp counter */
111  #define XVID_CPU_IA64           0x00000080  /* ARCH_IA64 */
112    #define XVID_CPU_IA64           XVID_CPU_ASM    /* defined for backward compatibility */
113    /* ARCH_PPC */
114    #define XVID_CPU_ALTIVEC        0x00000001              /* altivec */
115    
 #define XVID_CPU_CHKONLY        0x40000000              /* check cpu only; dont init globals */  
 #define XVID_CPU_FORCE          0x80000000  
116    
117          typedef struct          typedef struct
118          {          {
# Line 122  Line 126 
126    
127  #define XVID_INIT_INIT          0  #define XVID_INIT_INIT          0
128  #define XVID_INIT_CONVERT       1  #define XVID_INIT_CONVERT       1
129    #define XVID_INIT_TEST          2
130    
131  /*****************************************************************************  /*****************************************************************************
132   *  Initialization structures   *  Initialization structures
# Line 160  Line 165 
165    
166  /* Flags for XVID_DEC_FRAME.general */  /* Flags for XVID_DEC_FRAME.general */
167  #define XVID_DEC_LOWDELAY               0x00000001      /* decode lowdelay mode (ie. video-for-windows) */  #define XVID_DEC_LOWDELAY               0x00000001      /* decode lowdelay mode (ie. video-for-windows) */
168    #define XVID_DEC_DEBLOCKY               0x00000002      /* luma deblocking */
169    #define XVID_DEC_DEBLOCKUV              0x00000008      /* chroma deblocking */
170    #define XVID_DEC_DISCONTINUITY  0x00000004      /* indicates break in stream; instructs
171                                                                                            decoder to ignore any previous reference frames */
172  #define XVID_QUICK_DECODE               0x00000010  #define XVID_QUICK_DECODE               0x00000010
173    
174  /*****************************************************************************  /*****************************************************************************

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